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product structure silicon monolithic integrated circuit this product is not designed protection against rad ioactive rays . 1/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 tsz22111 ? 14 ? 001 www.rohm.com datasheet boost 1channel white led driver for large lcds bd9285f general description bd9285f is a high efficiency driver for white leds an d designed for large lcds. this ic is built-in a boos t dcdc converters that employ an array of leds as the light source. bd9285f has some protect function agai nst fault conditions, such as the over-voltage protecti on (ovp), the over current limit protection of dcdc (ocp) , led over current protection (ledocp), the open detection of led string. therefore bd9285f is availab le for the fail-safe design over a wide range output v oltage. features current mode dcdc converter vout discharge circuit as shutdown led protection circuit (open protection, led ocp protection) led protect detection as small pwm dimming signal over-voltage protection (ovp) and low-voltage protection (scp: short circuit protection) for the ou tput voltage vout adjustable soft start time constant the wide range of analog dimming 0.2v-3.5v the built-in transformation circuit from pulse to dc 2 pwm dimming signal the uvlo detection for the input voltage of the pow er stage fail logic output applications tv, pc display and other lcd backlight system. key specifications input voltage range: 9.0v to 18.0v dcdc oscillation frequency: 150khz (rt=100k ) active current consumption: 1.2ma(typ.) operating temperature range: -40 to +85 package(s) w(typ.) x d(typ.) x h(max.) sop18 11.20mm x 7.80mm x 2.01mm pin pitch 1.27mm figure 1. sop18 typical application circuit(s) figure 2. typical application circuit i i i i_ i i downloaded from: http:///
d a t a s h e e t 2/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f absolute maximum ratings (ta=25 ) parameter symbol ratings unit input voltage vccmax 20 v stb pin voltage stb 20 v ovp, uvlo, ss, rt, isense, fb, cs, tc54 pin voltage ovp, uvlo, ss, rt, isense, fb, cs, tc54 7 v pwm1, pwm2, failb, adim, adim_p pin voltage pwm1, pwm2, failb, adim, adim_p 20 v dimout, gate pin voltage dimout, gate vcc v power dissipation pd 687 (*1) mw operating temperature range topr -40 to +85 junction temperature tjmax 150 storage temperature range tstg -55 to +150 *1 pd derated at 5.5 mw/ for temperature above ta=25 , mounted on 70mm 70mm 1.6mm 1 layer glass-epoxy pcb. operation range parameter symbol range unit vcc power source voltage vcc 9.0 to 18.0 v dc/dc oscillation frequency fsw 50 to 800 khz the effective range of adim signal vadim 0.2 to 3.5 v pwm input frequency range fpwm 100 to 100k hz pin configuration package dimension, marking diagram figure 3-1. pin configuration figure 3-2. package dimension i i i i i_ lot no. downloaded from: http:///
a t a s h e e t 3/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 1.1 electrical character (unless otherwise specified ta=25 vcc=12v) parameter symbol limit unit condition min. typ. max. total current consumption circuit current icc 1.2 1.8 ma vstb=3v, pwm1=pwm2=0v standby current ist 0 3 a vstb=0v uvlo block operation voltage vcc vuvlo_vcc 6.5 7.5 8.5 v vcc=sweep up hysteresis voltage vcc vuhys_vcc 150 300 600 mv vcc=sweep down uvlo release voltage vuvlo 2.88 3.00 3.12 v vuvlo=s weep up uvlo hysteresis voltage vuhys 160 200 240 mv vuvlo= sweep down uvlo pin leak current uvlo_lk -2 0 2 a vuvlo=4v dc/dc block isense threshold voltage 1 vled1 1.47 1.50 1.53 v vadim=1.5v isense threshold voltage 2 vled2 3.33 3.50 3.67 v vadim=5.0v (as mask analog d imming) isense threshold voltage 3 vled3 -2 - +2 % vadim=0.7v oscillation frequency fct 142.5 150 157. 5 khz rt=100kohm gate pin max duty output nmax_duty 90 95 99 % rt=100kohm gate pin on resistance (as source) ronso 3.0 6.0 12.0 ion=-10ma gate pin on resistance (as sink) ronsi 1.2 2.5 5.0 ion=10ma rt pin voltage vrt 1.0 1.5 2.0 v rt=100kohm ss pin source current issso -4.20 -3.0 -2.14 a vss=2v ss pin low output voltage vss_l - 0.20 0.50 v vstb= 0v, ioss=50ua soft start ended voltage vss_end 2.7 3.0 3.3 v ss=sweep up fb source current ifbso -140 -100 -60 a visense=0.2v, vadim=1.0v, vfb=1.0v fb sink current ifbsi 60 100 140 a visense=2.0v, vadim=1.0v, vfb=1.0v ocp detect voltage vcs 450 500 550 mv cs=sweep up dc/dc protection block ovp detect voltage vovp 2.88 3.00 3.12 v vovp sweep up ovp detect hysteresis vovp_hys 50 100 150 mv vovp s weep down scp detect voltage vscp 0.14 0.20 0.26 v vovp sweep down scp detect hysteresis vscp_hys 25 50 75 mv ovp pin leak current ovp_lk -2 0 2 a vovp=4v downloaded from: http:///
a t a s h e e t 4/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 1.2 electrical character (unless otherwise specified ta=25 vcc=12v) parameter symbol limit unit condition min. typ. max. led protection block led ocp detect voltage vledocp 3.8 4.0 4.2 v visens e=sweep up led open detect voltage vopen 0.05 0.10 0.15 v vise nse=sweep down analog dimming block adim_p pin high voltage adim_ph 2.0 - 3.8 v adim_p pin low voltage adim_pl -0.3 - 0.8 v adim_p pin input mask voltage adim_ppu 4.2 - 5.6 v adim_p pin pull-down resistance radim_p 130 200 300 k vadim_p=3.0v adim pin output voltage h adimh 3.201 3.30 3.399 v adim_p=3.3v adim pin output voltage l adiml - 0.0 0.05 v adim_p =0.0v adim pin output resistance adimr 6.6 10 15 k adim pin leak current iladim -2 0 2 a vadim=4v, adim_p=5.0v isense pin leak current il_isense -2 0 2 a visense=4v dimming signal output block dimout source on-resistance ronso 6.0 12.0 24.0 ion=-10ma dimout sink on-resistance ronsi 1.7 3.5 7.0 ion=10ma tc54 block tc54 output voltage vtc54 5.2 5.4 5.6 v io=0ma tc54 available current |itc54| 100 - - a tc54_uvlo detect voltage tc54_th 2.232 2.4 2.568 v vstb=h, tc54=sweep down tc54_uvlo hysteresis tc54_hys 50 100 200 mv vstb=h- >l, tc54=sweep up tc54 discharge current tc54_dis 5 10 15 a vstb=h->l, tc54=4v stb block stb pin high voltage stbh 2.2 - 19 v vstb=sweep up stb pin low voltage stbl -0.3 - 0.8 v vstb=sweep do wn stb pin input current istb 2.0 3.0 4.5 a vstb=3.0v pwm block pwm pin high voltage pwm_h 2.0 - 5.0 v vpwm =sweep up pwm pin low voltage pwm_l -0.3 - 0.8 v vpwm =sweep down pwm pin pull down resistance rpwm 130 200 300 k vpwm =3.0v fail block (open drain) failb pin on-resistance rfail 0.75 1.5 3.0 k vfail=1.0v failb pin leak current ilfail -2 0 2 a vfail=15v downloaded from: http:///
a t a s h e e t 5/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 1.3 pin number, pin name, pin function no. name in/out function rating[v] 1 ovp in over voltage protection detection pin -0.3 to 7 2 uvlo in under voltage lock out detection pin -0.3 to 7 3 ss out slow start setting pin -0.3 to 7 4 rt out for dc/dc switching frequency setting pin -0.3 to 7 5 pwm1 in external pwm dimming signal input pin1 -0.3 to 20 6 pwm2 in external pwm dimming signal input pin2 -0.3 to 20 7 failb out abnormality detection output pin -0.3 to 20 8 adim in/out adim signal input-output pin -0.3 to 20 9 adim_p in adim pulse signal input pin -0.3 to 20 10 gnd - - 11 dimout out dimming signal pin for driving mosfet -0.3 to vcc 12 gate out dc/dc switching output pin -0.3 to vcc 13 stb in ic on/off pin -0.3 to 20 14 vcc - power supply pin -0.3 to 20 15 isense in current detection input pin -0.3 to 7 16 fb in/out error amplifier output pin -0.3 to 7 17 cs in dc/dc output current detect pin, ocp input pin -0.3 to 7 18 tc54 out 5.4v output pin, shutdown timer pin -0.3 to 7 downloaded from: http:///
a t a s h e e t 6/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 2.1.1 pin esd type ovp uvlo ss ia rt pwm1, pwm2 failb i adim adim_p dimout i i_ gate stb isense figure 4-1. internal equivalent circuit downloaded from: http:///
a t a s h e e t 7/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 2.1.2 pin esd type fb cs tc54 ia figure 4-2. internal equivalent circuit 2.2 block diagram figure 5. block diagram i i i i a a i_ i aa i a downloaded from: http:///
a t a s h e e t 8/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 2.3 typical performance curves 0.0 0.5 1.0 1.5 2.0 7 9 11 13 15 17 vcc[v] icc[ma] 1 10 100 1000 10000 10 100 1000 rt[k] frequency [khz] 0 20 40 60 80 100 120 0.5 1.5 2.5 3.5 4.5 fb[v] fb sink current [ua] -120 -100 -80 -60 -40 -20 0 0.5 1.5 2.5 3.5 4.5 fb[v] fb source current[ua] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 2 4 6 adim[v] isense feedback voltage [v] figure 6. operating current (icc) vs vcc figure 7. g ate frequency vs rt figure 8. fb sink current vs fb voltage figure 9. fb s ource current vs fb voltage figure 10. isense feedback voltage vs adim downloaded from: http:///
a t a s h e e t 9/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 2.4 pin function description pin1: ovp the ovp terminal is the input for over-voltage prote ction and short circuit protection of output voltag e. as ovp is more than 3.0v, the over-voltage protection (ovp) will wor k. on the other hand, ovp is lower than 0.2v, the sh ort circuit protection (scp) will work. at the moment of these det ections, the bd9285 stops the switching of the outpu t gate and starts to count up the abnormal interval, but ic do esn't reach latch off state instantaneously until t he detection continues up to the number of counts of gate terminals, which depend on the kind of abnormality. (please refer to the time chart in the section 3.5.7) the ovp pin is high impedance, because the internal resistance to a certain bias is not connected. so, the bias by the external components is required, even if ovp function is not used, because the open connection of this pin is not fixed the potential. the setting examples is separately described in the section 3.4.6, ?external components selection, how to set ovp, scp? pin2: uvlo under voltage lock out pin for the input voltage of the power stage. more than 3.0v(typ.), ic starts th e boost operation and stops lower than 2.8v(typ.). the uvlo pin is high impedance, because the internal resistance to a certain bias is not connected. so, the bias by the external components is required, even if uvlo function is not used, because the open connection of this pin is not fixed the potential. the setting examples is separately described in the section 3.4.5, ?external components selection, how to set uvlo? pin3: ss the pin which sets soft start interval of dc/dc con verter. it performs the constant current charge of 3.0 a to external capacitance css(0.001 f to 4.7 f). the switching duty of gate output will be limite d during 0v to 3.0v of the ss voltage. so the equality of the soft start interval can be ex pressed as following tss = 1.0*10 6 *css css: the external capacitance of the ss pin. regarding of the logic of ss=l (ss=l) = (pwm1andpwm2 have not asserted h since rese tb=l->h) or (latch off state) where resetb = (stb=h) and (vccuvlo=h) and (uvlo=h) and (tc54uvlo=h) please refer to the time chart on soft start behavio r in the section 3.7.4 pin4: rt dc/dc switching frequency setting pin. rt set the o scillation frequency inside ic. the relationship between the frequency and rt resis tance value (ideal) the oscillation setting range from 50khz to 800khz. the setting examples is separately described in the section 3.4.4, ?external components selection, how to set dcdc oscillation frequency? pin5, pin6: pwm1, pwm2 the on / off terminal of the led driver. led lights when both pwm signal are high (dimout = h ). the duty signal of this pin can control the pwm dimming. the high / low level of pwm pins are following. state pwm input voltage pwm1=h or pwm2=h pwm=2.0v to 5.0v pwm1=l or pwm2=l pwm= \ 0.3v to 0.8v ] [ ] [ 15000 = k khz f r sw rt downloaded from: http:///
a t a s h e e t 10/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f pwm1 and pwm2 have the functional difference, and g ate pin outputs only by the logic of pwm1. this is why only boost operation continues while pw m1=h, pwm2=l. in this case, the adequate confirmati on is required not to be over voltage of the output voltage vout. figure 11. pwm pin function pin7: failb fail signal output pin (open drain). as abnormal, th e internal nmos turn on. status failb output normal open abnormal gnd level pin8: adim the input output pin for analog dimming signal. the pin function can be changed according to the input level of adim_p pin. the pulse-dc transform circuit is included int o bd9285f. adim_p input level adim_p pin function adim pin function required signal to ic -0.3v a t a s h e e t 11/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f is decreased, on the other hand, the transient resp onse is delayed. and please keep in mind the error voltage if the pul l down resistor of adim pin will be connected. pin9: adim_p the pulse signal input pin for analog dimming. pleas e pull up the voltage level more than 4.2v(typ.), wh en dc signal is used for the analog dimming. in normal operation, p lease set the input voltage under 5.6v. for more de tails, please refer to pin descriptions. the input frequency of this pin assumed from 2khz t o 100khz. please keep in mind that the capacitor of adim pin is small considering of this input frequency, the erro r of led current can be cause. pin10: gnd gnd pin of ic. pin11: dimout this is the output pin for external nmos of dimming. the below table shows the rough output logic of ea ch operation state, and the output h level is vcc. please refer to the time chart in the section 3.7 for detail expla nations, because the dimout logic has the exceptional behavior. please in sert the resistance between the dimming mos gate to improve the over shoot of led current, as pwm turns from low to high. status dimout output normal pwm1 and pwm2 abnormal gnd level pin12: gate this is the output terminal for driving the gate of the boost mosfet. the high level is vcc of ic. frequ ency can be set by the resistor connected to rt. please refer to the pin description for the fre quency setting. pin13: stb on/off setting terminal for ic, which can be used t o perform a reset at shutdown. please reset this pin after latch off. regarding of the sequence of turning on, if the inp ut logic stb turns from low to high, the internal pow er supply is activated. after the positive edge of pwm is input , bd9285 starts the boost operation. the input voltage of stb pin toggles the ic state(ic on/off). please avoid the use of the intermediate le vel (from 0.8v to 2.2v). regarding of the power down sequence, while stb=l and tc54uvlo=h, in order to discharge the output voltag e, dimout logic can assert high, depending on the pwm logic. this discharge behavior is separately descri bed in the time chart in the section 3.7.3, or in the section 3.4.2 , ?how to shutdown and set tc54 capacitance? pin14: vcc power supply pin of ic. input range is from 9v to 18. 0v. the operation starts more than 7.5 v(typ.) and shuts down less than 7.2 v(typ.). pin15: isense this is the input terminal for the current detectio n. the error amplifier compares the lower voltage the analog dimming pin adim and 3. 5v. the abnormal voltage of this pin activates the protection function of led , such as ledocp, open. [led ocp protection function] more than isense = 4.0v (typ.), the over current of led ( ledocp) will be detected. if that states continues 4096 clock of ga te pin, ic will latch off. (please refer to the time chart in the section 3.7.8 .) [led open protection function] if open state (isense<0.1v) continues during 4 clocks inte rval of gate terminal, bd9285 starts to count the interval of the abnormal state. in that counting state, dimout logic keeps high output no m atter what pwm logic so that the open abnormal state can be detected continuo usly. if the abnormal condition continues by the completion of counting, bd9285 will be latched off. (please refer to the time chart in the section 3.7.7 .) exceptionally the open protect detection are masked i n the following conditions, case1. when pwm = l. isense is less than 0.1v even in normal ly, because dimout = l. case2. in the soft-start interval. isense is less than 0.1v, b ecause of the insufficient output voltage vout . pin16: fb this is the output terminal of error amplifier. mon itoring the isense terminal voltage, this pin outputs t he error signal with the analog dimming signal (pin adim) or 3.5v. after the completion of the ss, this pin outputs high impedance as the logic ?pwm1 and pwm2? asserts low . fb voltage i i i figure 14. isense pin circuit downloaded from: http:///
a t a s h e e t 12/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f is hold to the external capacitance. (for more detail on the compensation setting is des cribed in the section " 3.6 loop compensation".) pin17: cs the cs pin has two functions. 1. dc / dc current mode feedback terminal the inductor current is converted to the cs pin volt age by the sense resistor r cs and this cs pin voltage controls the output voltage by compared with the error amp output. 2. inductor current limit (ocp) termina l the cs terminal also has a over current protection ( ocp), if it voltage is more than 0.5v, the switching operation will be stopped compulsorily. both of above functions are enable after 300ns (typ. ) when gate pin asserts high, because the leading edge blanking function is i ncluded into this ic to prevent the affect noise. please refer to the sectio n 3.5.1 ?dcdc parts selection / how to set ocp?, for detail explanation. pin18: tc54 this is the 5.4v (typ.) output pin that is used for internal power supply . available current is 100ua tc54 can be used as a timer for the discharge of ou tput capacitance dcdc. for detailed instructions, p lease refer the section 3.4.2 ?how to shutdown and set tc54 capacit ance? figure 15. cs pin circuit i downloaded from: http:///

a t a s h e e t 13/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.1 application circuit example the bellows are example circuits of using bd9285f. ? ?? ? the basic application circuit example i i i i_ i i figure 16. the basic application circuit example ? ?? ? as for the dimming signal, the single pwm and the dc for analog dimming pwm1 pin and pwm2 pin are shorted. figure 17. the circuit example with single pwm (1) figure 18. the circuit example wi th single pwm (2) i i i i_ i i downloaded from: http:///
a t a s h e e t 14/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f ? ?? ? only analog dimming i i i i_ i i figure 19. the circuit example of analog dimming on ly ? ?? ? application example when use numerous ic the application circuit of analog dimming by extern al duty signal. i i i i_ i i i i i_ i i i i_ figure 20. the circuit example of when plural ic is used. downloaded from: http:///
a t a s h e e t 15/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.2 the detection condition list of the protection (typ. condition) protection detectio n pin detect condition release condition timer operation protection type pin condition pwm1 and pwm2 ss led open isense isense < 0.1v h(4ck) ss>3.0v isense > 0.1v 4096 count latch off led ocp isense isense > 4.0v - - isense < 4.0v 4096 count latch off uvlo uvlo uvlo<2.8v - - uvlo>3.0v no auto recovery tc54 uvlo tc54 tc54<2.4v - - tc54>2.5v no auto recovery vcc uvlo vcc vcc<7.2v - - vcc>7.5v no auto recovery ovp ovp ovp>3.0v - - ovp<2.9v 4 count latch off scp ovp ovp<0.2v - ss>3.0v ovp>0.25v 4096 count latch off ocp cs cs>0.5v - - - no pulse by pulse to reset the latch type protection, please input of stb logic to ?l? once. otherwise the detection of vcc uvlo, tc54uvlo is required. 3.3 the behavior list of the protection protect function the operation of the protection dc/dc gate output dimming transistor (dimout) logic soft start failb pin led open stops after latch h after 4clk, l after latch discharge after l atch l after latch led ocp stops immediately h immediately, l after latch discharge after latch l after latch stb stops immediately l if tc54<2.4v discharge immediately open uvlo stops immediately immediately l discharge immediately immediately l tc54 uvlo stops immediately immediately l discharge immediately immediately l vcc uvlo stops immediately immediately l discharge immediately immediately l ovp stops immediately immediately l discharge after latch l after latch scp stops immediately immediately l discharge after latch l after latch ocp stops immediately normal operation not discharge open please refer to the timing chart in the section 3.7 for the detail. downloaded from: http:///
a t a s h e e t 16/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.4 external components selection 3.4.1 the start up operation and the setting of soft start external capacitance the below explanations are the start up sequency of bd9285. figure 21. the turn-on waveform figure 22. the turn-on circuit the explanation of start up sequency when stb is h, the internal bias voltage of tc54 risi ng. with the first pwm=h, bd9285 enables output the boos t pulse, and the ss start to charge to the external capacitance. at this moment, the voltage of fb will be the same as ss voltage internally regardless of the pwm logic. the fb=ss voltage reach the bottom voltage of saw-toot hed wave and the dc/dc start to output the pulse si gnal. therefore the boost of vout is started. vout is boosted to fixed level, and the led current i s rising. when the led current reached to fixed level, fb is re moved from ss internally. the start up operation comp leted. ic start the normal operation by sensing the voltag e of isense pin. when ss is more than 3.0v, even if the l ed current does not flows, the clamped circuit of ss an d fb is off, and the protect detection of scp and open starts. the setting method of ss external capacitance as above desribed, dc/dc stops when the pwm1=l. it m eans the boost operation only enabled within pwm1=h duration and ss time will be extented while boost wit h samll pwm duty. also the ss time is affected by the output capacitance, the led current and application conditi ons. tss is defined as the time for the ss voltage to reac h to the fb feedback voltage. please set the tss long er than trise_min, which is the start up time of the minimu m pwm duty. when the fb voltage during led turns on is expressed vfb, the equality on tss is the following. so please set the external capacitance to meet the t ss>>trise_min. ] [ ] [3 ] [ ] [ sec a v vfb f c t ss ss = _ = i i i = i i _ downloaded from: http:///
a t a s h e e t 17/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.4.2 how to shutdown and set tc54 capacitance this ic is equipped the discharge function when shu tdown is operated. figure 23. the shutdown waveform and circuit explanation of shutdown sequence when stb=l, dc/dc and tc54 are stop. when stb=l, tc54uvlo=h, the dimout logic asserts the p wm logic. the voltage of tc54 (5.4v) will decrease b y the constant current -10ua and is discharged to 2.4 v. vout will be discharged and iled decresing. when the voltage of tc54 pin is under 2.4v(typ.), th e ic will shutdown. the setting method of tc54 external capacitance please use below formula to calculate the shutdown t ime toff. as shown the above, the pwm signal is required even after stb=l. the discharge interval of vout is the longest in the minimum pwm duty. please set the creg value with a enough timing margin from the end of the vout discharge to shutdow n. 3.4.3 the led current setting led current can be adjusted by setting the resistanc e r isense which connects to isense pin. the relationship between riset and iled current with dc dimming without dc dimming [setting example] if iled current is 400ma as adim is 1.5v, we can cal culate r isense as below. i i i i ] [ ] [ 10 ] [0.3 ] [ sec ua v f c t reg off = ] [ ] [ ] [5.3 ] [ ] [ ] [ = = a i v r a i v adim r led isense led isense ] [75.3 ] [4.0 ] [5.1 ] [ ] [ = = = a v a i v adim r led isense figure 24. the example of led current setting downloaded from: http:///
a t a s h e e t 18/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.4.4 how to set dcdc oscillation frequency r rt which connects to rt pin set the oscillation frequ ency of dcdc. the relationship between osc and r rt (ideal) where fsw is the oscillation frequency of dcdc [k hz] this equation is an ideal equation in which correct ion factors are not applied. the adequate verification with an actual set needs to be performed to set frequency precisely. [setting example] if dcdc oscillation frequency is 200khz, we can cal culate the r rt as below. ideal y figure 25. rt pin setting example ] [ ] [ 15000 = k khz f r sw rt ] [ 75 ] [ 200 15000 ] [ 15000 = = = k khz khz f r sw rt downloaded from: http:///
a t a s h e e t 19/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.4.5. how to set uvlo under voltage lock out pin for the input voltage of the power stage. more than 3.0v(typ.), ic starts bo ost operation and stops lower than 2.8v(typ.). the uvlo pin is high impedance, because the internal resistance to a certain bias is not connected. so, the bias by the external components is required, even if uvlo function is not used, because the open connection of this pin is not fixed the potential. the resistor value can be calculated by the below f ormula, if the vin voltage is monitored, and that is divided by the resistor r1, r2 like the below diagram. uvlo detection equality if vin decreases, r1, r2 value is expressed the foll owing formula by the vindet, the detect voltage of uvlo. uvlo release equality by using the r1, r2 in the above equality, the relea se voltage of uvlo can be expressed as following. [setting example] if the normal input voltage, vin is 24v, the detect voltage of uvlo is 18v, r2 is 30k ohm, r1 is calculated as following. by using these r1, r2, the release voltage of uvlo, vi ncan can be calculated as following. ] [ ] [2 ]) [2 ] [1 ( 0.3 v k r k r k r v vin can + = ] [ 163 ] [8.2 ]) [8.2 ] [ 18 ( ] [ 30 ] [8.2 ]) [8.2 ] [ ( ] [2 1 = ? = ? = k v v v k v v v vin k r r det ] [ 3. 19 ] [ ] [ 30 ] [ 163 ] [ 30 ] [0.3 ] [2 ]) [2 ] [1 ( ] [0.3 v v k k k v k r k r k r v vin can = + = + = i ] [ ] [8.2 ]) [8.2 ] [ ( ] [2 1 ? = k v v v vin k r r det figure 26. uvlo setting example downloaded from: http:///
a t a s h e e t 20/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.4.6. how to set ovp, scp the ovp terminal is the input for over-voltage prote ction and short circuit protection of output voltag e. the ovp pin is high impedance, because the internal resistance to a certain bias is not connected. so, the bias by the external components is required, even if ovp function is not used, because the open connection of this pin is not fixed the potential. the resistor value can be calculated by the below f ormula, if the vout voltage is monitored, and that i s divided by the resistor r1, r2 like the below diagram. ovp detection equality if the vout is boosted abnormally, vovpdet is the detect voltage of ovp, r1, r2 can be expressed by th e following formula. ovp release equality by using the r1, r2 in the above equality, the relea se voltage of ovp, vovpcan can be expressed as following. scp detection equality in the same way, the detect voltage of scp, vscpdet is [setting example] if the normal output voltage, vout is 40v, the detec t voltage of ovp is 48v, r2 is 10k ohm, r1 is calcul ated as following. by using these r1, r2, the release voltage of ovp, vovpc an can be calculated as following. moreover, by using these r1, r2 the detect voltage of scp, vscpdet is ] [ ][0.3 ]) [0.3 ][ ( ] [2 1 ? = k v v v vovp k r r det ][ ] [2 ]) [2 ] [1( 9.2 v k r k r k r v vovp can + = ] [ 150 ][3 ]) [3 ][48( ] [10 ][0.3 ]) [0.3 ][ ( ] [2 1 = ? = ? = k v v v k v v v vovp k r r det ][ 4.46 ][ ] [10 ] [ 150 ] [10 ][9.2 ] [2 ]) [2 ] [1( ][9.2 v v k k k v k r k r k r v vovp can = + = + = ][ ] [2 ]) [2 ] [1( 2.0 v k r k r k r v vscp det + = ][ 2.3 ][ ] [10 ] [ 150 ] [10 ][2.0 ] [2 ]) [2 ] [1( ][2.0 v v k k k v k r k r k r v vscp det = + = + = figure 27. ovp/scp setting example downloaded from: http:///
a t a s h e e t 21/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.4.7. how to set the interval until latch off bd9285 built in the counter by latch off time, that is performed by counting the oscillation clock whic h is set by the rt pin. since the common oscillation circuit is used for cou nting, the interval until latch off is correspondin g to the 4096 clock, which the gate pulse output continuously. please refe r the time chart of the operation from the detect a bnormality to the latch off in the section 3.7. latch off time bd9285 starts the counting up from the detection of each abnormal state, falls to the latch off state w hen the following interval has passed. only pwm=l input does not reset the timer counter, if the abnormal state continues. where latch time is the interval until latch off state r rt is the connected resistor of rt pin. [setting example] if the resistor of rt pin is 100k ohm, the timer la tch interval is as following. [sec] 10 5 . 1 ] [ 4096 10 5 . 1 ] [ 2 7 10 12 = = k r r latch rt rt time sec] [3. 27 10 5 . 1 ] [ 100 4096 10 5 . 1 ] [ 4096 7 7 m k k r latch rt time = = = downloaded from: http:///
a t a s h e e t 22/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.5. dcdc parts selection 3.5.1. how to set ocp / the calculation method for the current rating of dcdc parts bd9285 stops the switching by the ocp detect, when t he cs pin voltage is more than 0.5v. the resistor va lue of cs pin, r cs need to be considered by the coil l current. and t he current rating of dcdc external parts is require d more than the peak current of the coil. it is shown below that the calculation method of th e coil peak current, the selection method of rcs (t he resistor value of cs pin) and the current rating of the external dcdc parts. (the calculation method of the coil peak current, i peak) at first, since the ripple voltage at cs pin depend o n the application condition of dcdc, those put onto the equality to c alculate as following. the output voltage = vout [v] led total current = iout [a] the dcdc input voltage of the power stage = vin [v] the efficiency of dcdc = [%] and then, the averaged input current iin is calculat ed by the following equality and the ripple current of the inductor l ( il[a]) can be calculated by using dcdc the switching frequency, fsw, as followi ng. on the other hand, the peak current of the inductor ipeak can be expressed as the following equality. ? (1) therefore, the bottom of the ripple current imin is or 0 as imin>0, that operation mode is ccm (continuous cu rrent mode), otherwise another mode is dcm (discontinuous curren t mode). (the selection method of rcs) ipeak flows into rcs and that cause the voltage sig nal to cs pin. (please refer the right timing chart) that peak voltage vcspeak is as following. as this vcspeak reaches to 0.5v, the dcdc output stop s the switching. therefore, rcs value is necessary to meet the under condition. (the current rating of the external dcdc parts) the peak current as the cs voltage reaches to ocp l evel (0.5v) is defined as ipeak_det. ? (2) the relation among ipeak (equality (1)), ipeak_det (equality (2)) and the current rating of parts is r equired to meet the following please make the selection of the external parts to m eet the above condition such as fet, inductor, diode . [setting example] the output voltage = vout [v] = 40v led total current = iout [a] = 0.48v ][ [%] ][ ][ ][ a v v a i v v i in out out in = ][ ] [ ][ ] [ ][ ]) [ ][ ( a hz f v v h l v v v v v v il sw out in in out ? = ] [ v ipeak rcs vcs peak = << << det_ peak peak i i the current rating of parts ] [5.0 ] [ v v ipeak rcs << i i i 2 ][ ][ im a il a i in in ? ? = ][ 2 ][ ][ a a il a i ipeak in ? + = ] [ ] [ ] [5.0 det_ a rcs v i peak = figure 28. coil current waveform downloaded from: http:///
a t a s h e e t 23/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f the dcdc input voltage of the power stage = vin [v] = 24v the efficiency of dcdc = [%] = 90% the averaged input current iin is calculated as the following. and the ripple current of the inductor l ( il[a]) can be calculated if the switching frequency, fsw = 200khz, the inductor, l=100 h. therefore the inductor peak current, ipeak is the calculation result of the peak current if rcs is assume to be 0.3 ohm the rcs value confirmation the above condition is met. and ipeak_det, the current ocp works is if the current rating of the used parts is 2a, the current rating confirmation of dcdc parts this inequality meets the above relationship. the p arts selection is proper. and imin, the bottom of the il ripple current can be calculated as following. this inequality implies the operation is the contin uous current mode. ][ 89.0 [%] 90 ][24 ][48.0 ][40 [%] ][ ][ ][ ][ a v a v v v a i v v a i in out out in = = = ] [ 48.0 ] [ 10 200 ] [40 ] [ 10 100 ] [24 ]) [24 ] [40 ( ] [ ] [ ] [ ] [ ]) [ ] [ ( 3 6 a hz v h v v v hz f v v h l v v v v v v il sw out in in out = ? = ? = ? ] [ 13.1 2 ] [48.0 ] [89.0 ] [ 2 ] [ ] [ a a a a a il a i ipeak in = + = ? + = 0 ] [65.0 ] [48.0 ] [13.1 ] [ 2 ] [ ] [ >> = ? = ? ? = a a a a a il a i i in min v v a ipeak rcs vcs peak 5.0 ] [ 339 .0 ] [13.1 ] [3.0 << = = = ] [ 67.1 ] [3.0 ] [5.0 det_ a v i peak = = << << det_ peak peak i i the current rating ] [0.2 ] [67.1 ] [13.1 a a a << << = downloaded from: http:///
a t a s h e e t 24/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.5.2. inductor selection the inductor value affects the input ripple current . the equality in the section 3.5.1 is as following. where l: the coil inductance [h] vout: the dcdc output vo ltage [v] vin: the input voltage [v] iout: the output load current (the summation of led current) [a] iin: the input current [a] fsw: the oscillation fre quency [hz] if in the continuous current mode, please set S il to 30% - 50% of the output load current. * the current exceeding the rated current value of inductor flown through the coil causes magnetic sa turation, results in decreasing in efficiency. inductor needs to be s elected to have such adequate margin that peak curr ent does not exceed the rated current value of the inductor. * to reduce inductor loss and improve efficiency, i nductor with low resistance components (dcr, acr) ne eds to be selected 3.5.3. output capacitance cout selection output capacitor needs to be selected in considerat ion of equivalent series resistance required to even the stable area of outp ut voltage or ripple voltage. be aware that set led current may not be flown due to d ecrease in led terminal voltage if output ripple component is high. output ripple voltage S v out is determined by equation (4): (4) ][ 1 1 ????? v f i c r ilmax v sw out out esr out + = where, r esr is the equivalent series resistance of cout. * rating of capacitor needs to be selected to have adequate margin against output voltage. * to use an electrolytic capacitor, adequate margin against allowable current is also necessary. be aw are that the led current is larger than the set value transitiona lly in case that led is provided with pwm dimming es pecially 3.5.4. mosfet selection though there is no problem if the absolute maximum rating is larger than the rated current of the indu ctor l, or is larger than the sum of the tolerance voltage of c out and the rectifying diode v f . the product with small gate capacitance (injected charge) needs to be selected to achieve high-speed switching. * one with over current protection setting or highe r is recommended. * the selection of one with small on resistance res ults in high efficiency. 3.5.5. rectifying diode selection a schottky barrier diode which has current ability higher than the rated current of l, the reverse vol tage larger than the tolerance voltage of c out , and the low forward voltage vf especially needs to be selected. v out v in c out r cs l i l v out v in c out r cs l r esr i l ][ ] [ ][ ] [ ][ ]) [ ][ ( a hz f v v h l v v v v v v il sw out in in out ? = ][ 2 ][ ][ a a il a i ipeak in ? + = ][ [%] ][ ][ ][ a v v a i v v i in out out in = figure 29. the waveform and the circuit of inductor current figure 30. the output capacitor circuit i downloaded from: http:///
a t a s h e e t 25/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.6. loop compensation a current mode dcdc converter has each one pole (ph ase lag) f p due to cr filter composed of the output capacitor and the output resistance (= led current) and zero ( phase lead) f z by the output capacitor and the esr of the capacitor. moreover, a step-up dcdc converter has rhp zero (ri ght-half plane zero point) f zrhp which is unique with the boost converter. this zero may cause the unstable feedbac k. to avoid this by rhp zero, the loop compensation that the cross-over frequency f c set as following, is suggested. fc = f zrhp /5 (f zrhp : rhp zero frequency) considering the response speed, the below calculate d constant is not always optimized completely. it n eeds to be adequately verified with an actual device. figure 31. the circuit of output stage and the erro r amplifier i. calculate the pole frequency fp and the rhp zero frequency f zrhp of dc/dc converter where i led = the summation of led current, (continuous curr ent mode) ii. calculate the phase compensation of the error a mp output (f c = f zrhp /5) where iii. calculate zero to compensate esr (r esr ) of c out (electrolytic capacitor) *when a ceramic capacitor (with r esr of the order of milliohm) is used to c out , the operation is stabilized by insertion of c fb2. to improve the transient response, r fb1 need to be increase, c fb1 need to be decrease. it needs to be adequately veri fied with an actual device in consideration of vary from parts to parts since phase margin is decreased. v out vin c out r cs l r esr c fb1 fb r fb1 gm v out i led c fb2 ] [ 2 ) 1( 2 hz i l d v f led out zrhp ? = ] [ ) 1( 5 1 ? = d v gm f i r f r out p led cs rhzp fb ] [ 2 1 1 1 f f r c p fb fb = ] [ 1 2 f r c r c fb out esr fb = ] [ 2 hz c v i f out out led p = out in out v v v d ? = ][ 10 0.4 4 s gm ? = downloaded from: http:///
a t a s h e e t 26/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.7. timing chart 3.7.1 starting up 1 (stb inputs and pwm signal succe eds) a a y y i (*1)?tc54 starts up if stb turns from l to h. the pin ss is not charged in the state that the pwm s ignal is not input, the boost is not started. (*2)?the charge of the pin ss starts by the positive edge of pwm=l to h, and the soft start starts. the gate pulse outputs only during pwm=h. and as the ss is less than 1.1v, th e pulse does not output. the pin ss continues chargin g in spite of the assertion of pwm and ovp. (*3)?the soft start interval will end if the voltag e of the pin ss, vss reaches to 3.0v. by this time, bd9 285 boost vout where the set led current flows. it is started to monitor the abnormal detection of scp and open. (*4)?as stb=l, instantaneously the boost operation is stopped. (gate=l, ss=l) on the other hand, the dischar ge circuit works in the interval ?stb=l and v5uvlo=h?. please refer to the time chart in the section 3.7.3 for details . (*5)?as stb=h again, the boost operation restarts by t he next pwm=l to h. it is the same operation as the timing of (*1). please refer to the section 3.4.1 for the setting of soft start external capacitance. downloaded from: http:///
a t a s h e e t 27/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.7.2 starting up 2 (pwm signal inputs and stb succee ds) (*1)?tc54 starts up if stb turns from l to h. (*2)?at the moment the release of v5uvlo (the uvlo of the pin tc54), or the time of the positive edge of pwm=l to h, the soft start starts. the gate pulse outputs only durin g pwm1=h. and as the ss is less than 1.1v, the pulse d oes not output. the pin ss continues charging in spite of the asserti on of pwm and ovp. (*3)?the soft start interval will end if the voltag e of the pin ss, vss reaches to 3.0v. by this time, bd9 285 boost vout where the set led current flows. it is started to monitor the abnormal detection of scp and open. (*4)?as stb=l, instantaneously the boost operation is stopped. (gate=l, ss=l) on the other hand, the dischar ge circuit works in the interval ?stb=l and v5uvlo=h?. please refer to the time chart in the section 3.7.3 for details . (*5)?as stb=h again, it is the same operation as the t iming of (*1). downloaded from: http:///
a t a s h e e t 28/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.7.3 turn off i a a (*1)?as stb pin turns high to low, bd9285f stops the bo ost operation, starts the discharge of tc54. (*2)?during stb=l and v5uvlo=h, the dimout asserts the same logic of pwm. tc54=5.4v is discharged until 2.4 v by the constant current 10ua. and ic turns off. vout need to be discharged adequately so that led does not turns on drastically at the next start up. for detailed instructions, please refer the section 3.4.2 ?how to shutdown and set tc54 capacitance? downloaded from: http:///
a t a s h e e t 29/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.7.4 the soft start function (*1)?the ss pin charge does not start by just stb=h. ?p wm1=h and pwm2=h? is required to start the soft sta rt. in the low ss voltage, the gate pin duty is depend on the ss voltage . and as the ss is less than 1.1v, the pulse does not output. (*2)?by the low stb=l, the ss pin is discharged immedia tely. (*3)?as the stb recovered to stb=h, the ss charge starts i mmediately by the logic ?pwm1 and pwm2=h? in this c hart. (*4)?the ss pin is discharged immediately by the uvlo= l. (*5)?the ss pin is discharged immediately by the vccuvl o=l (*6)?the ss pin is discharged immediately by the tc54 uvlo=l (*7)?the ss pin is not discharged by the abnormal det ection of the latch off type such as ovp until the l atch off downloaded from: http:///
a t a s h e e t 30/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.7.5 the ovp detection (*1)?as ovp is detected, the output gate=l, dimout=l, and the cp counter starts (*2)?if ovp is released within 4 clock of cp counter of the gate pin frequency, the boost operation rest arts. (*3)?as the ovp is detected again, the boost operatio n is stopped (*4)?as the ovp detection continues up to 4 count by the cp counter, ic will be latched (*5)?as the latched off, the boost operation doesn't restart even if ovp is released. (*6)?the stb=l input can make ic reset. in this chart , dimout asserts high by the discharge function in the paragraph 3.7.3. (*7)?it normally starts as stb turns l to h. (*8)?the operation of the ovp detection is not rela ted to the logic of pwm. downloaded from: http:///
a t a s h e e t 31/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.7.6 the scp detection (*1)?during the soft start, the detection of scp is masked. (*2)?as scp is detected, the output gate=l, dimout=l, and the cp counter starts (*3)?if scp is released within 4096 clock of cp coun ter of the gate pin frequency, the boost operation r estarts. (*4)?as the scp is detected again, the boost operatio n is stopped (*5)?as the scp detection continues up to 4096 count by the cp counter, ic will be latched (*6)?the stb=l input can make ic reset. in this chart , dimout asserts high by the discharge function in the paragraph 3.7.3. (*7)?it normally starts as stb turns l to h. (*8)?the operation of the scp detection is not relat ed to the logic of pwm. downloaded from: http:///
a t a s h e e t 32/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.7.7 led open detection i i i a y y ????? ????? a (*1)?during starting up, even if the normality, isense< 0.1v because of the low vout. therefore the open detec tion will be masked for the soft start period. (*2)?in the same way, as pwm=l, isense<0.1v because of d imout=l. open will be masked, too. (*3)?though the open is detected if isense<0.1v as the pw m=h, it is not judged immediately to abnormal state . the behavior of gate, failb keeps the normal operation. (*4)?the cp counter will start if the open detection continues 4 clock of the gate frequency. to detect t he open state continuously, it compulsorily becomes dimout=h rega rdless of the pwm logic. (*5)?when the open detection continues up to 4649 cou nt with the cp counter, ic will be latched off. at t his time, it asserts gate=l, dimout=l, failb=l for the first time. (*6)?the latch off state can be reset by the stb=l. (*7)?it normally starts by stb=l to h, in this figur e. downloaded from: http:///
a t a s h e e t 33/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.7.8 led ocp detection (*1)?if isense>4.0v, ledocp is detected, it becomes gate= l. to detect ledocp continuously, the dimout is compulsorily high, regardless of the pwm dimming si gnal. (*2)?when the ledocp releases within the gate frequen cy 4096 counts of the cp counter, the boost operati on restarts. (*3) ?as the ledocp is detected again, the boost oper ation is stopped, too. (*4)?if the ledocp detection continues up to 4096 co unt with the cp counter, ic will be latched off. (*5)?once ic is latched off, the boost operation do esn't restart even if the ledocp releases. (*6)?the latch off state can be reset by the stb=l. in this chart, dimout asserts high by the discharge function in the paragraph 3.7.3. (*7)?it normally starts by stb=l to h. (*8)?the operation of the ledocp detection is not r elated to the logic of the pwm. downloaded from: http:///
a t a s h e e t 34/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f 3.7.9 the spontaneous detection ovp and open. i i a i a (*1)?the time chart shows the open detects faster and does not reach to the latch off state. the dimout asserts high. (*2)?if open and ovp is detected spontaneously, ovp has the priority, and gate=l, dimout=l. (*3)?ic will be latched off by the ovp factor. (*4)?the latch off state is reset by the stb=l. (*5)?the ovp has the priority too, in the case the o vp is detected first and the open succeeds. downloaded from: http:///
a t a s h e e t 35/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f operational notes 1.) this product is produced with strict quality co ntrol, but might be destroyed if used beyond its ab solute maximum ratings including the range of applied voltage or operation temperatu re. failure status such as short-circuit mode or o pen mode can not be estimated. if a special mode beyond the absolute m aximum ratings is estimated, physical safety counte rmeasures like fuse needs to be provided. 2.) connecting the power line to ic in reverse pola rity (from that recommended) may cause damage to ic . for protection against damage caused by connection in reverse polarity, co untermeasures, installation of a diode between exte rnal power source and ic power terminal, for example, needs to be taken. 3.) when this product is installed on a printed cir cuit board, attention needs to be paid to the orien tation and position of ic. wrong installation may cause damage to ic. short circuit caused by problems like foreign particles entering between outputs or between an output and power gnd also may cause dama ge. 4.) since the back electromotive force of external coil causes regenerated current to return, counterm easures like installation of a capacitor between power source and gnd as the path for regenerated current needs to be taken. the cap acitance value must be determined after it is adequately verified that there is no problem in properties such that the cap acity of electrolytic capacitor goes down at low temperatures. thermal design need s to allow adequate margin in consideration of allo wable loss (pd) in actual operation state. 5.) the gnd pin needs to be at the lowest potential in any operation state. 6.) thermal design needs to be done with adequate m argin in consideration of allowable loss (pd) in ac tual operation state. 7.) use in a strong magnetic field may cause malfun ction. 8.) output tr needs to not exceed the absolute maxi mum rating and aso while using this ic. as cmos ic and ic which has several power sources may undergo instant flow of rush curr ent at turn-on, attention needs to be paid to the c apacitance of power source coupling, power source, and the width and run lengt h of gnd wire pattern. 9.) this ic includes temperature protection circuit (tsd circuit). temperature protection circuit (tsd circuit) strictly aims blockage of ic from thermal runaway, not protection or assuranc e of ic. therefore use assuming continuous use and operation after this circuit is worked needs to not be done. 10.) as connection of a capacitor with a pin with l ow impedance at inspection of a set board may cause stress to ic, discharge needs to be performed every one process. before a jig is connected to check a process, the power needs to b e turned off absolutely. before the jig is removed, as well, the power needs to be turned off. 11.) this ic is a monolithic ic which has p+ isolat ion for separation of elements and p board between elements. a p-n junction is formed in this p layer and n laye r of elements, composing various parasitic elements . for example, a resistance and transistor are connec ted to a terminal as shown in the figure, when gnd>(terminal a) in the resistance and when g nd>(terminal b) in the transistor (npn), p-n juncti on operates as a parasitic diode. when gnd>(terminal b) in the transistor (npn), par asitic npn transistor operates in n layer of other elements nearby the parasitic diode described before. parasitic elements are formed by the relation of po tential inevitably in the structure of ic. operatio n of parasitic elements can cause mutual interference among circuits , malfunct ion as well as damage. therefore such use as will cause operation of parasitic elements like application of voltage on t he input terminal lower than gnd (p board) need to not be done. status of this document the japanese version of this document is formal spe cification. a customer may use this translation ver sion only for a reference to help reading the formal version. if there are any differences in translation version of this document formal version takes priority p substrate parasitic diode gnd n p p resistance transistor (npn) other adjacent components parasitic diode (pinb) (pina) p gnd p substrate gnd n n b c e n n (pina) (pinb) parasitic diode gnd gnd parasitic diode c b e downloaded from: http:///
! a t a s h e e t 36/36 tsz02201-0f1f0c100030-1- 2 ? 2012 rohm co., ltd. all rights reserved. 11.jul.2012 rev.001 www.rohm.com tsz22111 ? 15 ? 001 bd9285f ordering information b d 9 2 8 5 f xx part number package f:sop18 packaging and forming specification xx: please confirm the formal name to our sales. physical dimension tape and reel information marking diagram (top view) (unit : mm) sop18 18 0.3min 1.27 9 1 10 11.2 0.2 0.15 0.1 0.4 0.1 7.8 0.3 1.8 0.1 0.11 5.4 0.2 (max 11.55 include burr) 0.1 ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tapequantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2000pcs e2 ( ) direction of feed reel 1pin sop18(top view) b d 9 2 8 5 f part number marking lot number 1pin mark downloaded from: http:///
datasheet d a t a s h e e t notice - ge rev.002 ? 2014 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our products are designed and manufac tured for application in ordinary elec tronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electroni c appliances, amusement equipment, etc.). if you intend to use our products in devices requiring ex tremely high reliability (such as medical equipment (note 1) , transport equipment, traffic equipment, aircraft/spacecra ft, nuclear power controllers, fuel c ontrollers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (specific applications), please consult with the rohm sale s representative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ro hms products for specific applications. (note1) medical equipment classification of the specific applications japan usa eu china class class class b class class | class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditio ns, as exemplified below. accordin gly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of an y rohms products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subjec t to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse. is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7. de-rate power dissipation (pd) depending on ambient temper ature (ta). when used in seal ed area, confirm the actual ambient temperature. 8. confirm that operation temperat ure is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used; if flow soldering met hod is preferred, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:///
datasheet d a t a s h e e t notice - ge rev.002 ? 2014 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2. you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohms internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since our products might fall under cont rolled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with rohm representative in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. rohm shall not be in any way responsible or liable for infringement of any intellectual property rights or ot her damages arising from use of such information or data.: 2. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the information contained in this document. other precaution 1. this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any wa y whatsoever the products and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:///
datasheet datasheet notice C we rev.001 ? 2014 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:///

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